[Attachment(s) from Abid Rafique included below]
--
Best Regards,
PhD Student
Circuits and Systems Group
Electrical and Electronic Engineering
Imperial College
South Kensington Campus
London SW7 2AZ
---------- Forwarded message ----------
From: Rafique, Abid <a.rafique09@imperial.ac.uk>
Date: Wed, Dec 21, 2011 at 12:42 AM
Subject: FW: [HiPEAC-announce] Post-doc position at National University of Singapore
To: "abid.rafique@gmail.com" <abid.rafique@gmail.com>
________________________________________
From: hipeac-announce-bounces@hipeac.net [hipeac-announce-bounces@hipeac.net] on behalf of Kumar, A. [A.Kumar@tue.nl]
Sent: 15 December 2011 03:05
To: announcements@lists.artist-embedded.org; announce@hipeac.net; SoCinfo@cs.tut.fi
Cc: Ha Yajun (elehy@nus.edu.sg)
Subject: [HiPEAC-announce] Post-doc position at National University of Singapore
We are looking for top candidates to join our research group as Post-doctoral researchers in the following project.
A Power-Efficient Heterogeneous Architecture and Run-Time Manager for Data Center Servers
The idea of this project is to develop heterogeneous multi-processor architecture targeted towards servers in data centers. Our target architecture will have processors of different performance-power trade-offs including some processors operating at lower voltage. In addition to that it will have some reconfigurable logic, some application specific processors and some ASIC components in it. Having heterogeneous architecture would allow processors of different granularities to be integrated in one platform and give the middleware/operating system the opportunity to match the right processor or computing element for the right pay load job. For example, for a bit level encryption/decryption payload, it is extremely inefficient to execute them on a word level homogenous processor, but it can be extremely efficient to execute them on a fine-grain bit level FPGA platform in terms of power and timing. Heterogeneous server architecture makes this perfect matching possible, thus greatly saves the server computing energy as it is much more efficient.
Requirements
For Post-Doc positions, candidates should have a Ph.D. in Computer Engineering, Computer Science, Computational Science or a related area. A genuine interest and curiosity in the subject matter and excellent analytical and communication skills in English speaking and writing are required. Specifically, we are looking for people who have experience in working with GPUs (Graphics Processors) and/or Operating Systems.
Application Deadline
The positions are to be filled as soon as possible.
Contact
Please send your detailed application, including a CV and certificates, as email to Akash Kumar (akash@nus.edu.sg<mailto:akash@nus.edu.sg>).
----------------------
Dr Akash Kumar
Assistant Professor
Department of Electrical & Computer Engineering
National University of Singapore
Engineering Drive 3
Singapore 117583
Tel: (65) 6516-3364
Fax: (65) 6779-1103
www.akashkumar.net<http://www.akashkumar.net>
From: Rafique, Abid <a.rafique09@imperial.ac.uk>
Date: Wed, Dec 21, 2011 at 12:42 AM
Subject: FW: [HiPEAC-announce] Post-doc position at National University of Singapore
To: "abid.rafique@gmail.com" <abid.rafique@gmail.com>
________________________________________
From: hipeac-announce-bounces@hipeac.net [hipeac-announce-bounces@hipeac.net] on behalf of Kumar, A. [A.Kumar@tue.nl]
Sent: 15 December 2011 03:05
To: announcements@lists.artist-embedded.org; announce@hipeac.net; SoCinfo@cs.tut.fi
Cc: Ha Yajun (elehy@nus.edu.sg)
Subject: [HiPEAC-announce] Post-doc position at National University of Singapore
We are looking for top candidates to join our research group as Post-doctoral researchers in the following project.
A Power-Efficient Heterogeneous Architecture and Run-Time Manager for Data Center Servers
The idea of this project is to develop heterogeneous multi-processor architecture targeted towards servers in data centers. Our target architecture will have processors of different performance-power trade-offs including some processors operating at lower voltage. In addition to that it will have some reconfigurable logic, some application specific processors and some ASIC components in it. Having heterogeneous architecture would allow processors of different granularities to be integrated in one platform and give the middleware/operating system the opportunity to match the right processor or computing element for the right pay load job. For example, for a bit level encryption/decryption payload, it is extremely inefficient to execute them on a word level homogenous processor, but it can be extremely efficient to execute them on a fine-grain bit level FPGA platform in terms of power and timing. Heterogeneous server architecture makes this perfect matching possible, thus greatly saves the server computing energy as it is much more efficient.
Requirements
For Post-Doc positions, candidates should have a Ph.D. in Computer Engineering, Computer Science, Computational Science or a related area. A genuine interest and curiosity in the subject matter and excellent analytical and communication skills in English speaking and writing are required. Specifically, we are looking for people who have experience in working with GPUs (Graphics Processors) and/or Operating Systems.
Application Deadline
The positions are to be filled as soon as possible.
Contact
Please send your detailed application, including a CV and certificates, as email to Akash Kumar (akash@nus.edu.sg<mailto:akash@nus.edu.sg>).
----------------------
Dr Akash Kumar
Assistant Professor
Department of Electrical & Computer Engineering
National University of Singapore
Engineering Drive 3
Singapore 117583
Tel: (65) 6516-3364
Fax: (65) 6779-1103
www.akashkumar.net<http://www.akashkumar.net>
Best Regards,
PhD Student
Circuits and Systems Group
Electrical and Electronic Engineering
Imperial College
South Kensington Campus
London SW7 2AZ
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Attachment(s) from Abid Rafique
1 of 1 File(s)
MARKETPLACE
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